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RISC-V 32bit CPU
Hardware- 5 Devlogs
- 17 Total hours
A simple RV32I CPU implementation with video output, for use on the icepi-zero FPGA board.
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Worked some more on other typical features of a VGA text mode, such as highlighted text and blinking.
As you can see below, I got keyboard input to work, so now I can write programs that use keyboard input.
New features:
- Character colours
- UART input (keyboard input)
It’s pretty cool that I can also write the devlog on the CPU with the custom assembly code I wrote!
I finally fixed the branch logic, and proved that it works with this simple counter that uses the conditional BGE (branch if greater than or equal) instruction.
Currently working on debugging conditional branch instructions, as the wrong branch address is being targetted. Fortunately, I managed to fix the JAL and JALR jump instructions.
This is a project I’ve been working on already a fair bit, trying to make a half-decent RISC-V CPU for use on the icepi-zero FPGA board (that I got from the previous Flavourtown event :D). This is a testbench I’m running, currently trying to debug jump and branch instructions not working. My next step is adding keyboard input through the UART protocol (universal asynchronous receiver-transmitter)
