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This is a project I’ve been working on already a fair bit, trying to make a half-decent RISC-V CPU for use on the icepi-zero FPGA board (that I got from the previous Flavourtown event :D). This is a testbench I’m running, currently trying to debug jump and branch instructions not working. My next step is adding keyboard input through the UART protocol (universal asynchronous receiver-transmitter)

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