Devlog 04: 4-Column Planar Prepacking & First Real AIE Run
Standard GGUF interleaves nibbles row-by-row. But AIE2 vector tiles need weights split into 4 independent planar column channels aligned to 64-byte boundaries.
Wrote xdna-q4-prepack.cpp to deinterleave GGUF Q4 weights:
// 4-Column Planar Deinterleaving
for (size_t col = 0; col < 4; ++col) {
uint8_t* dst_col = packed_out + col * col_bytes;
for (size_t row = 0; row < N; ++row) {
const uint8_t* src_nibbles = src_weights + row * row_stride + col * (K / 4) / 2;
deinterleave_and_align64(src_nibbles, dst_col + row * 64, K / 4);
}
}
-
col * (K / 4): Strips matrix columns across the 4 independent NPU memory tiles. -
64-byte alignment: Direct DMA streaming into tile L1 SRAM without unaligned stalls. - Inside AIE:
aie::unpackconverts uint4 to BF16, scales, and computes fused vector MACs.
First interactive generation on physical NPU! Cosine similarity against CPU FP32 oracle: 0.9999.
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