SO the devlog may seem long… but i lost 2 hours of footage while routing so yeah .. i routed the ddr3 , that includes the diff pairs , length matching and impedance constrains , etc … bla bla bla tech stuff , this took longer and was harder than the double stack (2 ics in one) lpddr4 on the rockchip board , idk why , propably placement and fpgas being tricky in general !