SODIMM DDR3 is now finished ! , so this was reallyyyyyy easy , there was a reference and good section about it in the Kintex7 Fpga design NOTE , i picked a SODIMM 204Pin ddr3 slot and connected it to the fpga banks , some resistors and caps were necessary for the jedec standart but why did i even bother to use sodimm ddr3 ? , so i could go with ddr4 but the kintex7 tool for memory implementation isnt really and neither the speed made for it , also i took sodimm as i am able to easily swap the ram to other sizes or vendors , the pcb routing is way easier and ram modules can also be cheaper often then the bare ic for ddr3 … and the most importand part there is a eeprom on the modules containing the timing constrains !!!