Completed Day 5 by finishing off the ALU circuit. Added the other required components such as the SHR (one of the crucial input to the multiplexer and also has an op-code), and the ZERO_OUT and NEG_OUT flags, which flag if the CPU reads a 00000000 (ZERO_OUT), and when the most significant bit is a 1 which signifies a negative number (NEG_OUT), these flags are required to tell the computer about zeros and negatives when they are loaded onto the bus. Also, these 2 flags will be a part of the Flags Register later on.
Basically, today I just used splitter to get 1 bit outputs from 8 bits and used them to create the flags I described earlier. And I used logic to create the SHR which was also clever wiring of the splitter (SHR means the number’s bits are shifted right one place).
I will continue with the more important modules such as clock module in Day 6.