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1h 9m 39s logged

Yup
So now its 30/7/2026 U+8 Timezone 17:44 in HK rn
and lets start a new project to make a 8 bit Computer!
so the most important thing right now is to design the CPU that runs my own IS!

so i want the IS to be 1 Byte mainly and similar to z80 i think
may be 8 registers in total
(i REALLY LIKE Z80’s Design)
so im gonna use may be something like
AF (67)
BC (01)
DE (23)
HL (45)

with
PC
SP
as special register

so i need instructions like:
Load Reg,Reg
Args: 3Bit 8Reg x2

Load Reg,IMME
Args: 3Bit 8Reg and 8 Bit Value

Load Reg,[HL]
Args: 3Bit 8Reg

Load [HL],Reg
Args: 3Bit 8Reg

Load 16Reg,16Reg
Args: 3Bit 16Reg x2

Load 16Reg,IMME
Args: 3Bit 16Reg and 16 Bit Value]

Load [IMME],A
Args: 16 Bit Address

Load A,[IMME]
Args: 16 Bit Address

i think this will be enough for Load?

so actually we can group the commands to make it easier for Logic Circuit to identify them

such as Load Reg,[HL] and Load [HL],Reg actually have a really similar structure with only the direction difference so we can organize into a thing like
?Bit [Special LD] 1Bit [Direction(0=Reg->HL 1=HL->Reg)] 3Bit [Register]

also REG7 (REG F) actually not really useful for LD Instruction so we can make it [HL] Symbol
like LDPREFIX 000,111 means Load a Addressed Value to REG B

ok so it will hv something like
[8Bit LD Prefix] [REG1] [REG2]
for
Load Reg,Reg
Load Reg,[HL]
Load [HL],Reg

also Load [HL],[HL] is impossible cuz u need to Fetch and Write Back to memory in the same Instruction Cycle so we can let it be HALT (Just like how engineers did when design z80 LOL)

erm yah i think thats all for today :|

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