Completed the ALU with instructions like ADD, SUB, OR, AND, NOT, XOR etc.
Fixed an error in the 8-Bit adder. The ALU is finally working.
Got started with registers. The previous register is done. 8 Bit register and a register file is made. Debugging in Logisim is VERY painful.
Architecture: Keeping 4 Registers (General Registers) Any 2 Accessible in one Clock pulse. Will start working on rest of the memory logic soon. Following integration of the ALU with Registers.
Very excited.