A lot has changed

In the time since my last devlog, I have redesigned every single PCB and upended the entire project topology. So nothing that out of the ordinary

CAN Bus

Previously I was planning on using SPI as the primary data transfer method between the controller and the modules. However, after doing some math, that wouldn’t work at like above 100khz because reasons. So, now i’m switching over to a protocol that’s actually designed for being a Bus. There is a PIO library that supports CAN with an external transceiver for everything but bootloading, so I still need to keep the SWD lines around.

Infinite expandability

Because CAN doesn’t need interrupt or CS pins, this allows for you to add as many modules as you want. All you’ll need to do is plug in more backplanes!

Removed features

The only feature I removed is POE. The power module connector has all the pins required to make it available, but I decided that it isn’t worth the space or time for this first prototype

Well, I do actually still need CS pins

I lied earlier. While it is true that CAN Bus does not need CS pins, the design still needs them. This is because SWD is not a bus protocol, and so needs multiplexing for true control. While SWD does have a multi-device mode, the RP2040 and 2350 uses it to control each core, meaning it won’t work with more than 1 device connected at once. However, this is still a good thing, because the SWD CS lines can be much slower than SPI CS (for my application). This means that I can use GPIO expanders for these lines, and even use them for other module insert detection and module identification.

Funding update

I got rejected because I didn’t include a BOM, now I’ve resubmitted with a full BOM. Hopefuly I’ll get approved soon!

Oops, I went to get a rendering of a PCB and I realized a part was backwards. Here is the fixed PCB

I am now under review for funding!

Note for the people reviewing this
The $400 is only for the PCBs, and that’s only about half. The PCB total is $730, and I can afford to pay the remaining out of pocket.

The PCBs themselves are only $430, but because I live in the US the shipping and tax and customs is $300.

The $430 is including assembly and component cost. I am unable to assemble them myself because I have chronic hand tremors, making it impossible to place rp2040s and rp2350s.

This won’t just be a fantastic learning opportunity for me, but it also has the potential to change the live sound industry. I have designed this to be a sales-ready product, and at scale it would be at least $100 cheaper than the competition. In addition, the virgil controller will be used to develop the virgil protocol. For more information, seem y projects readme.

Thank you for your time and concideration

Devlog #2

I have finished work on my PCBs. For real this time. Probably. I am now to the point where I am at a practical deadend until I get the boards, so this may be my last devlog before my first ship.

So, I should probably fill you in on what this project is, and why it matters

This project is built like a modular controller, complete with hot swap motorized faders and networking. While building anything modular is hard, that is not the main point of this project. The main point is for it to be a devboard for the Virgil protocol. The Virgil protocol is a network protocol I am designing to make the live sound industry more standardized and less dominated by singular brands.

For more information, go to the Virgil Controller github, in the project information.

Virgil Controller Devlog #1

I can proudly say that I have actually made progress during this challenge!

I have updated my controller PCB to use the rp2350 chip without a carrier board for cost reasons, complete with a pretty 45 degree angle

The kicad wakatime program just… isn’t working, so I completed this in an astonishing 15 min.

Now onto making the modules use the bare chip.

Virgil Controller Devlog #-1

I wrote a devlog #0.5, but it just didn’t post. It doesn’t really matter, because I have made negative progress since then, therefore devlog -1

I’ve decided that instead of using rp2040 modules, I’m going to make the PCBs have the bare chips on them. Which means it saves me money, but I’m needing to go back and redo a lot of work. It’s getting pretty late, so I’m gonna commit my partial readme and continue in the morning. Here’s my existing mainboard, so that you can see the darling that I’m killing.

I saw someone doing quote of the day, so I’m gonna do a subtle variation of that

Project insight of the day: “Get good at killing your darlings”

P.S.
How are yall doing that fancy markdown formatting?

Love JLCPCB. Hate Shipping and customs

Completed enclosure 3D Model!

After fighting with Onshape for several days, I finally completed the enclosure. The only downside is that a couple of the parts are impossible to 3d print, but that’s a future me problem. Time to order the PCBs

Completed module backplane