YOU WANT A DEVLOG, YOU WANT ONE, HUH????? HERES A DEVLOG FOR YOU:

net_name: “spi_sck”
dont_route: true

FUCK YOU RENESAS FUCK YOU FUCKING PIECE OF SHIT FUCK YOU!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! YOUR PLACE AND ROUTE TOOL IS UTTER GARBAGE!!!!!!!!!!!!!!!!!!!!!!!!! WHY ARE YOU IGNORING USER NETS!!!!!!!!!!!!!!!!!!!!!!! STOP. OPTIMISING. THE. USER. CODE.

Edit: I figured what’s up
Aparently Renesas bought dialog semiconductor which bought silego, which made their greenpak line of fpgas, which was essentially scratch/Lego mindstorms for fpgas, and not meant to handle actual verilog, which when renesas made their forgefpga line they just reused greenpak

hence the mind boggling bugs

its like trying to run c in scratch

fuck my chud life