devlog #2 => initial cpu core

implemented the first functional version of the CPU core

• added 8bit registers and 16bit program cointer
• added status register with bit masks
• added memory read/write interface with 64 kb of memory space
• added initial ‘LDA’ implementation
• added reset vector handling
• added basic instruction fetch and opcode dispatch
• added test suite in main function to test the functional

currently, the core architecture is kinda of working, failing mosts tests i made (the tests could be wrong lol). even if it was working, still it is incomplete, more instruction, addressing modes, accurate flags, cycle timing, interrupts and variant-specific behavior remain to be implemented.