Devlog 3: Major Changes to Schematic

Over the past week, I have significantly evolved the flight computer architecture, migrating the design from a high-level ESP32 module to a custom chip-down design using the ESP32-PICO-D4. This transition required the manual implementation of all essential “life support” circuitry, ensuring the system can handle the rigors of flight.

Key Schematic Improvements:

1. Chip-Down Migration: Transitioned to the ESP32-PICO-D4, requiring a custom power bus and complete decoupling implementation using uF capacitors for power stability and pF capacitors for RF performance.

2. Antenna Optimization: Implemented a formal Pi-network between the radio module and antenna connector to properly match impedance, ensuring effective signal transmission.

3. Infrastructure Addition: Integrated manual Boot/Programming buttons and a dedicated UART header to facilitate reliable code deployment and real-time debugging.

4. Design Cleanup: Removed redundant components (such as external Flash memory) by leveraging the integrated features of the PICO-D4, resulting in a cleaner, more reliable board.

5. Power Integrity: Added critical decoupling across all power rails to prevent brown-outs during high-current radio transmissions.

The schematic is now ready for the physical PCB layout phase.